The present invention relates to electronic circuits, and more particularly, to circuits and methods for measuring phases of periodic signals.
Interfaces that transfer data at high speeds use high frequency clock signals that are generated by circuitry such as a phase-locked loop (PLL). Accuracy between the phases of the output clock signals generated by the PLL is required to ensure that a high speed interface functions properly. Even a small misalignment in the phase of a PLL output clock signal may cause the high speed interface to malfunction.
Analog measurements can be performed to measure the phase difference between two clock signals. The input clock signals are transmitted as inputs to a phase frequency detector (PFD) that generates an output voltage having an analog DC (direct current) value that is based on the phase difference between the two input clock signals. Measuring the DC value of the output voltage of the PFD is an analog measurement. In order to measure the output voltage of the PFD, the output voltage of the PFD is transmitted to a test pin. If the PFD is not built into the device, then the two clock signals that are to be measured are transmitted to test pins and then the phase difference is measured using a tester.
One problem with making an analog measurement of the DC value of the output voltage of a PFD is that the time required to make such a measurement is long. Analog signals require a very long time for making measurements compared to digital signals. Also, parametric measurement units may have to be installed on the tester, which are expensive. In order for the tester to have access to the signals to be tested, the signals have to be routed to test pins and from the test pins to bumps on the printed circuit board (PCB) to make the measurements. Routing high speed signals to test pins is difficult and expensive.